Integrated circuits (ICs) such as microprocessors are typically mounted on package substrates that help to provide an interface between the integrated circuit die and a circuit board. A typical package substrate may include alternating metal and dielectric layers. Among the metal layers, some may form ground or power planes and others may be used for signal traces. In the case of the ground or power plane layers, it is known to form adhesion holes in the layers so that the two dielectric layers on either side of the ground or power plane may adhere to each other. This may aid in preventing delamination of the substrate structure.
According to some typical practices, signal traces in metal layers that are adjacent to a ground or power plane layer (with a dielectric layer in between, of course) are routed so as not to pass over the locus of the adhesion holes in the adjacent ground or power plane. This is done because signals in traces which pass over or under an adhesion hole or holes may suffer distortion due to crosstalk and/or timing skew. However, as IC technology advances, there is a tendency to increase the density of signal traces in the package substrate, which leads to conflicts with the desire to avoid routing traces over or under adhesion holes. One way of resolving this conflict is to increase the number of signal layers, but this increases the cost of the package substrate.